timing with most flash memory is a max speed problem not a min speed problem. In all likelihood almost any mcu would be able to write to it.
Seems the chip is a 4Gb SLC flash chip. First and second google search hits.http://www.alldatasheet.com/view.jsp?Searchword=K9F4G08U0B-PIB0
Does anyone else HATE alldatasheet.com and all those other junk sites that you get instead of a real manf website during a google search. PISSES ME OFF!
Honesty one of the most painful parts of your project is that it is parallel flash. That's a lot of I/O lines to wire up by hand.
Another point of pain will be address mapping of bad memory blocks, meaning you will have to write around those blocks. You'd need to understand how the main system handles those bad blocks as well.
------------------ FROM DATASHEET--------------Initial Invalid Block(s)
Initial invalid blocks are defined as blocks that contain one or more initial invalid bits whose reliability is not guaranteed by Samsung.
The information regarding the initial invalid block(s) is called the initial invalid block information. Devices with initial invalid block(s)
have the same quality level as devices with all valid blocks and have the same AC and DC characteristics. An initial invalid block(s)
does not affect the performance of valid block(s) because it is isolated from the bit line and the common source line by a select transistor. The system design must be able to mask out the initial invalid block(s) via address mapping. The 1st block, which is placed on
00h block address, is guaranteed to be a valid block up to 1K program/erase cycles with 1bit/512Byte ECC. Identifying Initial Invalid Block(s)
All device locations are erased(FFh) except locations where the initial invalid block(s) information is written prior to shipping. The initial invalid block(s) status is defined by the 1st byte in the spare area. Samsung makes sure that either the 1st or 2nd page of every
initial invalid block has non-FFh data at the column address of 2048. Since the initial invalid block information is also erasable in
most cases, it is impossible to recover the information once it has been erased. Therefore, the system must be able to recognize the
initial invalid block(s) based on the original initial invalid block information and create the initial invalid block table via the following
suggested flow chart(Figure 3). Any intentional erasure of the original initial invalid block information is prohibited.
It isn't that hard to write one of these things, but if this is your first time working with flash memory there are easier places to start such as with small serial flash chips or EEPROMs. This is a little more advanced.
What are you trying to do? Hack the firmware out of an Xbox or something?Posted on: November 21, 2012, 04:26:08 04:26 - Automerged
Also, your part number is incomplete for purchasing one:
K9F4G08U0B-BCB0T00 K9F4G08U0B-PCB K9F4G08U0B-PCB0
K9F4G08U0BPCB0 K9F4G08U0B-PCB0000 K9F4G08U0B-PCB0T
K9F4G08U0B-PCB0T00 K9F4G08U0B-PCBO K9F4G08U0B-PIB
K9F4G08U0B-PIB0 K9F4G08U0BPIB0 K9F4G08U0B-PIB0000
They come in a lot of flavors. a quick look suggests that whichever one you need probably won't be easy to get your hands on.