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Author Topic: Function of SCR in this circuit  (Read 2367 times)
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max
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« on: February 28, 2011, 06:24:52 18:24 »

hi friends,

can someone explain the function of scr in this circuit.

regards

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solutions
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« Reply #1 on: February 28, 2011, 08:48:40 20:48 »

Looks like a synchronous rectifier.  Keeps reverse polarity current from the transformer from flowing in the power stage MOSFET.  In other words, current flows in one half of the primary only at any given time and only in the DS direction in the MOSFET.
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« Reply #2 on: March 01, 2011, 08:40:18 08:40 »

I try to give my through:
if T4 is turned OFF, the T3 is turned ON and triggered the Ty2 which becomes ON.
at the same time T6 is turned ON and current flows from Tr.3 to Tr.2

Now, let's assume Ty2 is shorted.
The voltage at Tr.2 will drop from 24V to 0V.
since the current in an inductor cannot disappear immediatly, the voltage at  Tr.2 will become negative and the current will traverse D-S (though the reverse protection diode in T6). This current may last too long and will overlap the current flowing from Tr.3 to Tr.1 (when T5 is in action)

Now assume no shorted wire accross Ty2.
When Tr.3 becomes 0V (or slightly negative), the Ty2 will enter automatically in OFF state. The clampling action will be done with D2 and the internal diode in T6.
So I guess that T6 & Ty2 are for switch ON, and Ty2 is just for switch OFF.



Posted on: March 01, 2011, 08:34:45 08:34 - Automerged

I may add that with this circuit, the OFF condition is automatically done, without the necessity to adjust the timing of drive signal.
My 0.2ct
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Walkura
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« Reply #3 on: March 11, 2011, 10:34:33 22:34 »

Maybe i'm going a little off topic here.
But i had quite some troubles over time with thyristors triggering due to dv/dt.
Since there are no snubbers or any other prevention measures to limit dv/dt(assuming its driven with a tl494 and therefore i assume its a frequency in the Khz range)
Shouldn't these thyristors trigger even without the gates connected (i mean being a pwm regulator those mosfets should switch in a matter of uSec's or even nSec's)
(please correct me if i'm wrong but i was just wondering)
« Last Edit: March 12, 2011, 09:01:40 21:01 by Walkura » Logged
Tanuki
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« Reply #4 on: May 03, 2011, 10:56:18 22:56 »

Walkura has an important point. There are no snubbers to supress the leakage inductance fly-back. High dv/dt will in all likelihood trigger the SCR's as Walkura mention and destroy the MOSFETs.  Even if the SCR's were removed the snubbers would still be needed. This means this circuit is not a real design.

That said, academically the SCR's seem to provide two functions, time delay to avoid shoot-through and the bulk of the heat dissipation losses.

Shoot-through is where both MOSFETs and SCRs are overlapping conduction causing large currents in the devices and the transformer. Sharing dissipation losses allows great currents to be handled without over heating the MOSFETs (more later on this).

The SCR's will not trigger until their cathodes are below 9 volts (+12v-Vbe-Dfv-Vgt: driver supply voltage, less the transistor Vbe, less the forward voltage of the in series gate diode and the SCR minimum gate turn on voltage). This provides both the delay to avoid shoot-through and for the SCR to take the brunt of the turn-on losses.

Normally shoot-through would be avoided in the MOSFET driver design, typically a S-R flip-flop to provide a dead-time.

I've designed SMPS circuit for many years and I've never seen this SCR arrangement before, normally one would avoid conductive losses in the power flow path when ever possible. The SCR's Vtm is 1.9V at 100A. This would not be so bad if the supply voltage where several hundred volts and the currents rather small, but this half bridge is only +24V and large currents. Compare the SCR conductive losses to the IRFP064 ... 9mOhms at Id=78A! Seems the MOSFETs are much better than the SCR's! This causes one to really wonder what the designer was thinking ... or not thinking Wink   It appears that it was intended for the MOSFETs to provide SCR commuting only and not much else! Likely as well, shoot-through was never considered. Not much to learn here!
« Last Edit: May 03, 2011, 10:58:30 22:58 by Tanuki » Logged
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« Reply #5 on: May 22, 2011, 10:22:04 22:22 »

Sure is a very strange arrangement. In all my 15 years designing power inverters, never seen something like this. This appears to be some bad attempt at protection of some kind. Something you will never see in any professional design.
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« Reply #6 on: May 23, 2011, 11:24:47 11:24 »

My opinion...  SCR-s are very robust (Mosfets are not), so is possible with SCR-s to make simple and reliable invertors. But, when is SCR opened, hi stays in this state, until decrease anode/catode current to zero. In usual push-pull arangement is obviously impossible to turn SCR off. So created author of this circuit simple solution, Mosfet in series vith SCR. When is Mosfet off, falls SCR current to zero and SCR closes. In this circuit bear the greatest load SCR, and Mosfet the smallest.
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« Reply #7 on: May 23, 2011, 03:38:16 15:38 »

In any inverter you always try to keep losses to a minimum. With two switching devices in series the resulting efficiency will suffer a lot. I have seen parallel MOSFETS in industrial battery charger designs where the main control element is a SCR. The MOSFET is then used to turn off the SCR during set current limit conditions.
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