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 1 
 on: Yesterday at 10:24:05 pm 
Started by dmitry24z - Last post by Signal
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 2 
 on: Yesterday at 10:18:19 pm 
Started by Dgtslot - Last post by Signal
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 3 
 on: Yesterday at 09:54:11 pm 
Started by Comiter - Last post by Comiter
CountryNorway
NoteWorking with electronics as a hobby. Educated masterdegree in cybernetics, works mostly with MicroChip and Arduino. Different projects ongoing, latest now is MPPT charger, programmable lab supply and a smart mailbox.

 4 
 on: Yesterday at 09:33:47 pm 
Started by StefDrums - Last post by Signal
Just to make things fun Wink


 5 
 on: Yesterday at 08:56:57 pm 
Started by StefDrums - Last post by vern
Signal:
Quote
I'd say 1/3d
of course you are right, what was I thinking

PICker: although I had a recommendation for  drivers for multiplexig  I would try another solution for a led count of 18 if you are free to connect them in a different way:
I would use 3   8 bit shift registers like for example 74HC595 and and not a matrix.
The advantage is static display, low current for diving the LEDs and very simple programming. You can even control the LED Brightness with the output enble input via PWM.
And it runs with 2V.

 6 
 on: Yesterday at 06:27:22 pm 
Started by StefDrums - Last post by PICker
StefDrums defined a specific Power Supply:
- power supply voltage: I can choose it from 2.2 V to 3.0 V (but low consumes less)
in the datasheet of the MAX7219/MAX7221  you can read:
"For applications requiring 3V operation or segment
blinking, refer to the MAX6951 data sheet."
https://datasheets.maximintegrated.com/en/ds/MAX6950-MAX6951.pdf
these device are similar to MAX6958/MAX6959.

 7 
 on: Yesterday at 05:36:01 pm 
Started by debugasm - Last post by Signal
It is actually much clearer, thanks.
You are welcome. Note however that making these formulas without graphical support I easily made mistakes (see corrections in post above).

Quote
It's exactly as you say. Half-Band that does have a passband edge at -3dB is much shorter than any other Custom Half-Band.
Lost in translation. I implied quite opposite. Maybe sometime I shell refresh my impression comparing specific filters, to be more confident in arguments.

Quote
A loop is not synthesizable
I can not help here. FPGA is not in my current focus. But when you finish, share with us how. It is interesting.

 8 
 on: Yesterday at 04:33:41 pm 
Started by StefDrums - Last post by Signal
... since they are on only 1/18th of the time.
I'd say 1/3d

- the circuit must have a low power consumption
If you are not stuck with certain 6x3 LED matrix device consider new generation of LEDs - they are much effective than ones from XX century, and thus at 1 mA are brighter than old ones at 20 mA. That could be a useful option for low power consumption - to begin from choosing energy efficient device.

 9 
 on: Yesterday at 11:53:28 am 
Started by StefDrums - Last post by StefDrums
Thank you vern,
so I think that with low side and high side driver my circuit will be something like this (attached picture)

Can I have some problem in switching when both low side and high side driver are turned off?

 10 
 on: Yesterday at 10:55:39 am 
Started by debugasm - Last post by debugasm
Quote
8 multipliers at 100MHz
Lets consider the case "(64/8) * (2) * (25/16) * (8/2) = 100"
as a first approximation:
If "8/2" takes  4 multipliers at 100 MHz    {filter length 32}
then "25/16" can take 6 multipliers at 25Mhz   {filter length 150}
and 15.5 multiplications remains for "2" at 16MHz that is  {filter length 124 for Halfband and 62 for asymmetric frequency response}
Could work. What do you think?

I think it would be wonderful to be able to create a filter chain in this way, maybe with the last filter that selects the two configurations. I make some more elaborate calculations.

Quote
For example I do not know how conditional break of loop is handled in FPGA, while expect that loops naturally are unrolled there.

A loop is not synthesizable, only this form is valid:

Code:
for S in 1 to 8 loop
    S_index(S) := S * S;
    S_index(S) := S_index(S) * S;
end loop;

Quote
Another "problem": can FPGA effectively calculate the following formula without need of composing phases from filter coefficients?
  yⱼ = ∑hₙᵢ₊ₖxₘ₋ᵢ,
where n, k and m are invariants:
  n is nominator of fractional factor (7 or 8 in your case),
  k =(j*d)(mod n), where d is denominator (2 in this case),
  m also depends on j, n and d (it's your part to find how).

For me it is not very clear, the study better.

Quote
  (64/7) * 2 * (25/16) * (7/2) = 100
   (64/8) * 2 * (25/16) * (8/2) = 100

for frequencies normalized by FN:

   fpass,"8" = 0.834*(8/25)/8 =  0.033
   fstop,"8" = ((25/4) - 0.834)*(8/25)/8 =0.217
   fpass,"7" = 0.834*(8/25)/7 = 0.038
   fstop,"7" = ((25/4) - 0.834)*(8/25)/7 =0.248

so you need a filter with

   fpass = max(0.033, 0.038) = 0.038
   fstop = min(0.217, 0.248) = 0.217

Where fmax/FN = 0.834, just for clarity:

(64/7) ---> fmax = 3.81 ---> Fn = 4.571428 ---> fmax/FN = 0.834
(64/8) ---> fmax = 3.34 ---> Fn = 4.000000 ---> fmax/FN = 0.834

Quote
Let P = fmax/FN = 0.834.

Then first stage filter:
   fpass = P/2;
   fstop = 1 - P/2.

Second stage filter:
   fpass = (P/2)/25;
   fstop = 1 - (P/2)/25.

Third stage filter:
   fpass = ((P/2)/(25/16))/7;
   fstop = 1 - ((P/2)/(25/16))/8.

It is actually much clearer, thanks.

Quote


First - filters become "shorter". While sum of orders of two sequential filters remains the same, one of the filter has sparse coefficients that is connected with its frequency response (see blue line above).

Second - interpolator by 2 allows two tricks.
  a) filter coefficients for both phases are symmetric. (And still could be a part of optimal decomposition in above illustrated sense)
  b) halfband filter has no multipliers in one of the phase. That is great but sometimes does not worth. For example Halfband filter with 0.01 dB ripple in passband and 60 dB in stopband could be 3 times (too lazy to check it now) longer than filter with 3dB at passband edge and 60 dB stopband. Also take into account the picture above - Halfband filter will not cooperate with next cascade that way.

You notice very well the contribution of the two filters H1 and H2 to get the "red" filter that is perfect. Where at first glance H1 and H2 suffer from a lot of ripple in passband.

Quote
b) halfband filter has no multipliers in one of the phase. That is great but sometimes does not worth. For example Halfband filter with 0.01 dB ripple in passband and 60 dB in stopband could be 3 times (too lazy to check it now) longer than filter with 3dB at passband edge and 60 dB stopband.

It's exactly as you say. Half-Band that does have a passband edge at -3dB is much shorter than any other Custom Half-Band.

Quote
Another consideration. Imagine passband without ripples like Chebyshev2, Bessel or Batterworth filters have. Most likely a non ideal AFC of such passband will be corrected by line equalizer of receiver. But nonlinear components that are result of resampling are not cleanable. Add to this that ripple in passband as linear mistake is not multiplied as nonlinear background at decimation.

It's something I never thought of. Indeed with very weak signals the problem of a bandwidth with ripples could increase the difficulty in reception, worsening the conditions unlike what could be imagined.

Thanks again for the magnificent contribution.

Now I'll do another quiz, just to complicate things, I add two more configurations :

a) 64/7 MHz ----> 100 MHz
b) 64/8 MHz ----> 100 MHz
c) 48/7 MHz ----> 100 MHz
d) 40/7 MHz ----> 100 MHz

To contribute I have already set up a series of equations

Code:
a) 64/7 * 2 * x * a = 100
b) 64/8 * 2 * x * b = 100
c) 48/7 * 2 * x * c = 100
d) 40/7 * 2 * x * d = 100

x = 35 / (4 * d)

a = (5 * d) / 8
b = (5 * d) / 7
c = (5 * d) / 6
d ~ 0

Just to complete the mess.

 Roll Eyes

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