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I have to build something like that :



I have to receive two transport streams from two satellites (or the same one), taking 16 MP2 / AAC audio streams, decoding them and sending them to 16 I2S transmitters.

FPGA would do the raw work of extraction and transmission, ARM would do the work of decoding and management.

Any FPGA with an ARM on board (Zynq or Cyclone) would be ideal, I am well aware of this and it was the initial idea, but for cost issues I have to split the two parts with two separate chips.

All this does not seem to be too complicated but I am stalled on the part of EBI <-> AXI Master, this was the basic idea but maybe there is some other technique.

A few flashes of genius ?

Thanks very much.

debugasm

What are you trying to do?

Thanks for replay.

I have already Zybo, ZedBoard, MicroZed, ZC702. I do not have Altera but it's similar.

I have to build inexpensive hardware, leave hard work on the FPGA (as small as possible) and use a relatively powerful ARM for calculation / management.

 

Not an answer, but an idea: there are some pretty cheap cyclone dev-boards like the de10-nano that contain chips that are more than twice or thrice the price of the dev board itself. You could base your design around such a board.

... but not Zynq or Cyclone, only separate chips.

Hi friends, I nedd of some help with new pcb hardware for me. I have to interface a quite powerful ARM processor to an FPGA (Spartan 6) with a speed of at least 250 Mbit/s (32 MB/s) definitely obtained with DMA (I imagine).

I can not and I do not want to use Zynq or Cyclone (with integrated ARM) because these are too expensive and complicated.

I have select this device to connect together:

ATSAMA5D35

Spartan-6 XC6SLX75

From what I understand the only bus that can be used for this purpose is "External Bus Interface (EBI)" or "Static Memory Controller (SMC)" but which one is best suited to my purpose ?

My FPGA (Spartan-6) has interconnected peripherals built using EDK without Microblaze (replaced by external ARM) this internally uses an AXI bus. How to physically connect this ARM to the internal AXI bus so you can use peripherals on FPGA ?

Does anyone know a VHDL/Verilog interface to be implemented on FPGA to build a "bridge" between EBI/SMC and "AXI Master Bus" (with burst capability) ?

After all this, a small example of a linux driver to use the devices ...   ...

Can someone help me ? Does anyone have experience on this type of interface ?

Thanks for any help.

debugasm

Wow - I see the surgery went very well for you in Thailand...

 

Just changed to

Wow - I see the surgery went very well for you in Thailand...

 

I'm sure there are mods to the forum script that can do exactly what you want, but another option if those mods are never implemented, might be to add those threads to your notify list, at least then you will have easy access to all those threads in your profile sort of similar to a list of bookmarks...

Would be nice (but I realize a fair bit of work) for us to be able to mark useful posts or topics for each user's reference later.

There must be some script out there to do that if this sounds useful to everyone.

This "CAD" software was recently reviewed by "sexycyborg" (she/it is not shy about flaunting the gigantic  Thailand "bolt-ons", though the outfit in this clip is unusually modest) on Youtube  https://www.youtube.com/watch?v=b4a4LOVHs9I&t=0s

Looks like toyware to me - with no back end or third party software for it to work with, I can't understand why anyone would want to learn it. Or pay $300 for it....in China.