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Please use the compiler version XC-DSC V3.31.01. Now the compiler supports this kind of device, and XC32 no longer supports it. Please use XC-DSC in the future.

if one wants gnd pins for every 2 or for each just ad a 3 or 4 row headers and lengthen pcb a bit and connect pins to gnd

I'll tell you right away, I've had a long break from programming, so I've forgotten a lot, but I ran into this problem.
I made a demoboard for myself with a PIC32AK1216GC41036 MCU. I've started to slowly brush up on my programming knowledge.

The problem I encountered was that everything was fine with compiler version 5.00 (and earlier). But upgrading to version 5.10 returns a message saying the compiler doesn't have information about this controller.

Code:

pic32m-gcc.exe: error: unrecognized command-line option '-mcpu=32AK1216GC41036'

And if I searched around, I saw that in version 5.00 the directory looked like this:


and in version 5.10 it looked like this:

and the search returned no results for these processors.

I'll tell you right away, I've tried every possible trick and trick I know, but the results are negative.

Can someone tell me how to upgrade to 5.10 or add the missing MCUs to the compiler?
I would be grateful for your help.

only the pcb file with fine tuning

according to jlcpcb 0.3mm with 0.45mm pad is no extra cost

and via with 0.2mm hole 0.45mm pad no extra cost either

project finished no document nor gerbers created

please check schematics and schematic components as well as footprints for any mishaps/errore

everything connected
4 layer board with 0.35 minimum holes
40 pin analyzing
2 trigger inputs
3v3 1v1 where 1v1 is adjutable for overclocking
selectable voltage input 5v 3v3 2v5 1v8, 5v tolerant
4 x 64mbit memory chips
tune it to your preferences

realizing 6 layer boards is a quite a price jump above $180 and 4 layer boards a lot cheaper

so pcb 's are now 4 layer

since tiny holes are expensive to get i will try to get those 0.35mm, fixed holes are 0.35mm and up

3v3 and 1v1 is created by ldo's and same with the vref to be able to use inputs with 5v 3v3 2v5 and 1v8
manually selectable inputs per datasheets are 5 tolerant

1v1 is made adjustable to better support overclocking

extra pins are made test pads

to-do
connect mem ic's and their decouple capacitors
modify 3v3 and 1v1 pour
clear up traces
guess other suff not though of right now

pics and proejct files shared

p.s. i hope you like the changes to make it cheaper to make

the big brother changed direction a bit cutting the last 8 bits

added 5v 3v3 2v5 1v8 manually selectable

4 to memory chips

2 for triggers

and 2 spare

and 40 bits analyzed

annotized and ready for placement and a "rough" route

since the 24+bit is stopped at the stage of waiting for input on the schematic it self

i thought about to make a project with its bigger brother gpio 0-47 which will be 48bits thats if all pins are usable
it is in the beginning stages pic attached

i tried to contact gusman himself and all i got was him insisting that this is an AI creation which it is not

and also complained about some placement of the decoupler capacitors which is an easy to fix if pick-place isnt able to handle placement

also about why i used 1206 well there is more than enough space around the muxxers, also about placement that the decoupler caps was under the chip

and also why everything was connected and not only what was needed, its eaasy to delete but not so easy to add when a board is all routed,

since all that extra didnt create any issues.

that is why i am asking for inout on the schematics, reading close to 1400 pages together plus the errata, where much of it wont make any sense to me
i have done some simple things with pics

i have made the portable eclipse for arm and thats what i know about arm and thats not much at all

i forgot to say, check my libs as allways

the schematic was made for a version with big brother chip qfn-80 32bit but got very cramped
i made pcb quite a bit bigger, so now this board might work with its big bother

and i will wait at this stage because i want to hear for input on schematics if it works or needs changes
to make it work, because some pins might have hidden features, like gpio29, deleting is easy
adding to a finished design not so much, thats why it looks this way, this is not final but getting closer

so therefor all inputs are connected, i have found an easy way to fix that

one just connect non used input to gnd and that will make "non-float", then a repour and the traces will be covered by gnd plane
to revert shelve plane and connect to net and repour plane and those traces are back with minimal work