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Author Topic: [Req] Invite Fanlee  (Read 81 times)
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Fanlee
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« on: June 30, 2016, 07:06:27 19:06 »

CountryUK
NoteI am working on Xillinx FPGA development boards , using VHDL source and IP block design.

Looking for some support for subsystem and protocol/architecture design. I can contribute by providing access to my completed projects and repositories as well ad providing support to newcomers to VHDL and module design.

Yes, its my boring but cool hobby. Thanks for considering in advance.
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