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Author Topic: [Req] Invite mtiger  (Read 1418 times)
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mtiger
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« on: December 12, 2012, 03:48:48 03:48 »

CountryUSA
[/td][/tr][tr][td]Note[/td][td]Specialties:Modeling of DSP, OSI, connections (e.g. Utopia,USB,SPI), TDR, ... using Verilog, VHDL, Matlab, C/C++, EM modeling using COMSOL, CST MWS, etc.
Projects: VHDL/Verilog Wavelet Transforms, Verilog PHY+MAC+LN, Matlab wavelets+neural networks+ADRC, TDR symlet post-processor
What can you bring to this forum? Advanced mathematical analysis+synthesis, vhdl/verilog coding, large library of electrical and computer engineering books and papers.
Why do you want to join? Share ECE knowledge with other engineers and scientists.
Is it hobby or your job? PhD candidate[/td][/tr][/table]
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