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Author Topic: 12 bit ADC 100MHZ DSO  (Read 5063 times)
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larry_tye
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« on: October 13, 2011, 01:42:34 13:42 »

 In this link http://www.ssalewski.de/DAD.html.en  
I found a 12 bit 100M sample rate of dso using xilinx fpga and atmel usb controller . 12 bit ADC data are passed to fpga but only 8 bit data from fpga passed to usb controller , I wonder to know how 12 bit data "shorted" to 8 bit data Huh?
« Last Edit: October 13, 2011, 01:45:21 13:45 by larry_tye » Logged
DreamCat
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« Reply #1 on: October 17, 2011, 08:43:22 08:43 »

bit shift, divide to two byte, and transmit twice.
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May be I expressed the wrong meaning, sorry for my bad english. Please correct it for me if you can.
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