Flyback converter Design.. Need Help

[abcsantosh]

    Hi guys, I am working on wide input range, peak current control, discontinuous mode flyback converter. Input specs. are 70VAC to 265Vac. Vo 24V Io 1.5A. Switching freq. is 50KHz. Lpri is 432uH. Ipeak is 1.9Apk. Current sense resistor is 0.68 Ohm. The PWM Controller I am using is UC3842.
    I built the transformer using Siemens N87 EE/30/15/7 core. Primary turns are 45 and sec are 16 with the turns ratio of 3. The problem is I am getting too low duty cycle because the Peak current slope is too stiff, because of  that current limit is activated. Required on time is D=0.5 which is 10uS. But I get only 500nS on time. Why is this happen ? Because of this little on time, I get only 8 V output on secondary side while input voltage is Vinmin 98VDC and at full load. . I tried too much on transformer, but nothing could solve the problem. Also I have checked the current sense input for proper filter which filters out the leading edge spike. There is no other spikes or glitch found on VCC or Output.
    I need the peak current shape as flat as possible, so I will get the desired on time of 10uS at Vin minimum. Help me guys. 

The circuit diagram I am using is Micrel Application Note. The schematic is attached here as jpg. Pls Note that I am using this circuit as guideline. I am not using it as it is, rather I modified the specs for my own needs.

[tAhm1D]

Hi abcsantosh,
I have studied your circuit. Flyback Topology is cheaper but toughest in nature among all topologies in smps. Lot of Formulas have to be taken into consideration in it. Normal winding calculation like other topology will not be applicable here. Input and output inductance, proper air gap, proper transient suppression method and many other parameters have to be reckoned with. However, I am attaching a practical circuit according to your requirement. Hope, you will find it helpful.

[rajudp]

which software you are used?

[samir]

I Normally preffer TOP and TINY chaep from
http://www.powerint.com/
http://www.powerint.com/en/products/tinyswitch-family/tinyswitch-iii
http://www.powerint.com/en/design-support/pi-expert-design-software
they have software for thier Transformer and Topology disign and work fine for your design specs.

[abcsantosh]

Hi guys, I appreciate your valuable feedback.
     tAhm1D, I am trying on this flyback circuit too hard, because I want to know every aspect of SMPS. One thing I always wonder about this topology is, I always get stiffer current (Primary Ipeak Ramp) On Isense pin regardless of power or anything else. I also checked the opamp bandwidth for desired input range and duty cycle. I never get the wanted duty cycle in this circuit. For example I have calculated 10 uS duty cycle for above mentioned circuit. But I never get it more than 1 or 2 uS. My controller prematurely end up with low duty cycle because of that ramp whose amplitude reach 1V cuttoff limit of Isense in less time.
     How can I control or slow down the Primary peak current ramp ? So that I can get the almost 50% duty cycle on Vinmin and full load. Believe me, I used proper snubbers and filtered out some possible spikes in circuit. Also I have checked the leading edge spike on Isense Pin. It is Ok.
     The circuit you attached is great thing. I noticed The 1k resistor from Mosfet gate to Isense pin. What is the purpose of this resistor ? Is it related to my problem ? I have many questions for you. But I will ask them one by one.
      Have a nice day.           

[rajudp]

thanks, i asked about magic flyback software

[tAhm1D]

thanks, i asked about magic flyback software

Hi rajudp,
I made Magic Flyback software myself for personal use.

[tAhm1D]

Hi abcsantosh,

      I always get stiffer current (Primary Ipeak Ramp) On Isense pin regardless of power or anything else. I also checked the opamp bandwidth for desired input range and duty cycle. I never get the wanted duty cycle in this circuit. For example I have calculated 10 uS duty cycle for above mentioned circuit. But I never get it more than 1 or 2 uS. My controller prematurely end up with low duty cycle because of that ramp whose amplitude reach 1V cuttoff limit of Isense in less time.

You get high Ipk on Is pin because, in a flyback converter, Ipk is 5.5 times the nominal current.
The cutoff limit is exceeded, maybe, because you are using incorrect value of Is which causes a 1v offset at an undesired Ipk.
 

     How can I control or slow down the Primary peak current ramp ? So that I can get the almost 50% duty cycle on Vinmin and full load. Believe me, I used proper snubbers and filtered out some possible spikes in circuit. Also I have checked the leading edge spike on Isense Pin. It is Ok.

You can control the peak current ramp using snubber for transient absorption with appropriate resistor, capacitor and diode.

I noticed The 1k resistor from Mosfet gate to Isense pin. What is the purpose of this resistor ? Is it related to my problem ?

The 1k resistor is not actually to be seen as between MOSFET gate and Is pin, rather between MOSFET gate and source pins to prevent undesired turning on of the MOSFET.

[abcsantosh]

Hi tAhm1D, I am working on your suggestions. As soon as I will find something, I will return to you.

[rajudp]

Hi TAhm ID , Can u please share the software.

[abcsantosh]

Hi all, I am still working on problem. I tried almost five designs of transformers with various turns ratios, area product, air gap and winding structure too. I confirmed that there is no problem in transformer. So I tried on another things like, removing and investing snubbers of mosfet and rectifier diode. but no improvement found. Then I thought, may be it is happening because of line filter so I added the line filter. But no use.

Then I noticed again that the shape of Isense is like continuous mode conduction. The ramp on pedestal. Because of this shape now I am thinking that the core is not able to store the enough power, or the stored power in core is not delivered properly.(I mean core is not resetting in half period + dead time) so the ramp on pedestal is appearing.  Which reason is true ?

I am attaching the photo of waveforms. See and guess what is happening.
1) Isense waveform 1uS 500mV 2) Drain waveform 100V and 5 uS 3) Output Voltage 5V and 5 uS
These waveforms are without snubbers. If I use the snubber the leakage spike is almost gone.
Input is minimum Vdc and full load condition.

[abcsantosh]

Hi all, regarding this problem I need real flyback transformer winding method. Where can I get it ? In books or good application notes. Books will be more preferred choice. Any suggestions ?

[tAhm1D]

Hi,
You could read books by Marty Brown, Pressman, Raymond Mack and Ron Lenk. Everything is clearly written there and you will be crystal clear.

[abcsantosh]

     Hi tAhm1D, I already have those books. Marty Brown, Pressman, and Ron Lenk. I studied well these books before starting this project, surely I will read these books once again. But there is one interesting thing I want to share with you.
     Last night I opened one old dotmattrix printer. I found one 24V flyback inside it. I removed the transformer and used it in my converter and everything works well. The Isense ramp, on time at min vdc. Everything is perfectly ok. Measured Inductance is larger than I required but it's ok.
     This means, the problem is inside the transformer. The construction method, especially. The insulating tape, warnish, wire insulation or winding structure. Now I have to work on this.
     So tell me about it. Where can I get the commercial method of making transformer ? Especially flyback transformer. Interleaving and varnishing and type of insulating tapes. How can I assemble the transformer for R & D purpose ? Help me.

Have a nice day

[tAhm1D]

Hi abcsantosh,
Follow those Books and specially follow the parts where Transformer winding process is enumerated. There is no difference between the Transformer winding process of different Topologies in smps. First don't go for commercial type, stick to test type. You could try to wind the Transformer by your hand, slowly but steadily. Test it,improve it and then go for machine winding. After few try, you can learn many lessons. Moreover, select wire size according to frequency keeping in mind the skin effect. Flyback is the most difficult Topology in smps.

[abcsantosh]

     Hi tAhm1D, I got your suggestions. Finally I found the culprit. It is the inter winding capacitance, whose behavior lead the flyback transformer to malfunction. This capacitance is formed between two winding layers. This capacitance store the energy during operation and when switch turns on, it try to discharge it heavily. Since the considerable capacity is formed, it's fast dv/dt rate cause the fast voltage ramp to rise up on Isense resistor and so the controller reach it's current limit and prematurely turns off the switch. That's why flyback inductor is not storing required energy.
     The cure is, identify the capacitance in winding layers and add the proper insulation between it to nullify the capacitance. That is exactly now I am doing. I tested two transformers with positive results. Now I am optimizing them according to your suggestions. If I get the results ok , I will post the waveforms here.
     Your anticipation is most appreciable.             

[tAhm1D]

Hi TAhm ID , Can u please share the software.

Hi rajudp,
Yes, I hope to share with you all soon. I am doing some final adjustments. After that it will be uploaded.

[Kombinator]

I am doing some final adjustments. After that it will be uploaded.

Very good project.
Greetings

[rajudp]

Hi TAhm1D,
thanks
very interesting software, can reduce a lot of design time.

[rajudp]

hi tahm1d

any progress in software?

[tAhm1D]

Hi rajudp,
Sorry, it's not completely ready yet, as recently I've been focusing on learning the dsPIC rather than developing this software. So you must wait.