Title: [Req] Invite Vladimirv
Post by: Vladimirv on March 27, 2015, 08:40:56 08:40
| Country | Russia | | Note | I'm a student.
My interest - logical projects hdl and verilog for FPGA.
On the Internet I often see links on this forum and want to see this information.
I hope in the future to increase knowledge and be useful to the community.
Thank. |
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