TPS563200 PCB

[metal]

I did this PCB in KiCAD, I am not sure if it can be improved, any thoughts?
The constraints implied by the PCB shape and those in the datasheet made it really difficult to accomplish better work, may be someone else can make it better..

[Old_but_Alive]

This must be a new chip 'cos Mouser wont have them until January 2021

[metal]

I will order TPS563200, in case I got them before mouser does, I will send you the PCB and the chip, you have to pay for the shipping

I have ordered some parts from farnell 3 weeks ago, they are in Dubai now, shame I didn't see this IC earlier..

Any way, we still have to make this PCB better!

[Old_but_Alive]

happy to pay, I havent worked since Dec 2019, due to COVID, so my brain needs some excercise
I will get back to you on my thoughts on the layout

[metal]

Did minor mods, added correct footprint for L1.

[Sideshow Bob]

I see the eval board has taken a slightly different design route. You can take a look at it and maybe use some details. I have not used this IC my self, and do not know it at all
https://www.ti.com/lit/ug/slvuaa3/slvuaa3.pdf?ts=1602340881899

[Old_but_Alive]

the inductor seem a long way away from the IC, probably the output capacitor also

[Wilksey]

I'll presume it's a SMPS IC, i've not looked at the design but I usually use a few "rules".
If you can ensure a solid plane, and if necessary use plenty of vias.
Keep output "switching" components as close to the IC as possible, you don't want that noise going all over the place.
In most cases the output path is the important one, inductor, capacitor, bootstrap cap, keep these as tight as you can, worry about the other bits later.

I am not saying my way is the absolute 100% best way but as a rule of thumb I have had 100% success rate with these considerations.  I have a few SMPS on 2 layer board, but the bottom is purely GND and the top is GND poured and stitched where practical, I will go to 4+ layers if the design calls for it, most can be done on 2 layer though.

[metal]

I see, look at this, I think this one is much more improved.

[cesare]

Hi all,

the routing rules for a step down DC/DC converter are few and simple.

you must minimize 2 loops :

1) the loop that comprise input capacitor, high side switch, inductor and output capacitor.

2) the loop taht comprise the low side switch (or the freeweling diode), the inductor and the output capacitor.

The first loop is less critical because the circulating current is triangular. The second loop is more critical because the circulating current is trapezoidal and contains discontinuities.

In few words : both the input and output capacitors should return to the power ground of the controller (or the freeweling diode)on the top layer with a wide trace.

Another suggestion is to keep analog ground (for example the return of the feedback network) separated from power ground and connect it to power gnd at a single point (star ground)

Regards

[metal]

Here is the latest version, as per recommendations above, I looked at the EVAL PCB, my design distances are far smaller than the EVAL one!

[metal]

Here is the latest version, real major changes/improvements, can also be used up to 5A with TPS565201, but you might need to change the inductor footprint:

- Making the VFB a lot shorter, taking the net directly from the VOUT pin
- two layer design instead of 4-layer
- added closer capacitor to VIN and VOUT
- Using keepout areas trying to craft how current flows through filled zones

can be also used with TPS565201 and other chips similar to TPS563200, I will not list them here, you can go to webench and see all possible/compatible ICs..

[TucoRamirez]

silly question, how to choose the via diameter/distance to use for those tracks?  any thumbrule or you take the default settings? (i'm doing a sepic MCP1661T design but i don't really know how to do a proper via stitch adapted to that (also if a ground stitching is ok or is too much).

[metal]

if silly, why ask then?

Posted on: October 16, 2020, 06:01:05 18:01 - Automerged
Look at saturn PCB toolkit

[sphinx]

I am sharing a generic design for tps562200 and tps563200 please read info in shematic sheet no production files, gerbers are created.
Add mounting holes or change design for your own liking.

please check IC / all of  the design for any errors.

ii did not want to hijack the thread made by metal.

link in atachment

[metal]

my aim was to get sth like OKI-78SR, feel free to post in the same thread.

[sphinx]

if you want you can move this to your thread.

i had a look at that circuit one can easily change my design to 3 pin connector if wanted.

[sphinx]

I am sharing a modified version of my generic design for tps562200 and tps563200 with a 3 pin connector. please read info in shematic sheet no production files, gerbers are created.

Add mounting holes or change design for your own liking.

please check IC / all of  the design for any errors.

link in atachment

I have not checked if this version is able to handle 3A on the pins, with the widths on the tracks it should be to do it according to saturn pcb toolkit.

P.S. i forgot to mention that calcultaions for amperage was done with 2oz copper in mind.