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December 07, 2016, 11:18:48 23:18


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Author Topic: CMOS Inverter LTSpice simulation on Phase and Gain plot  (Read 423 times)
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promach
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« on: February 21, 2016, 02:23:27 02:23 »

Dear all Sonsivri seniors.

I am doing a LTspice simulation on CMOS inverter Phase and Gain.

The LTspice amplifier symbol inside the test circuit is a CMOS inverter.

Please find below the gain and phase graph.



The line with red arrow pointing to it indicates the phase and the other line indicates the gain in dB

I have tried to google and look into books and find out the theory behind the graph but I could not get the answer.

Please advise.
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sarbandi70
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« Reply #1 on: February 21, 2016, 06:03:29 06:03 »

Hi;
you can click on Vout on your graph and a graph cursor will be appear.
you can change the position of cursor and watch any value of the graph.

best regards;
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PICker
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« Reply #2 on: February 21, 2016, 08:18:31 08:18 »

Have a look to the last plot on this link:
http://www.ee.surrey.ac.uk/Projects/CAL/linear-systems/m303-frequency.htm
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promach
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« Reply #3 on: February 21, 2016, 06:57:48 18:57 »

I understand gain margin and phase margin.

What I need to understand is how the gain and phase are calculated for this CMOS inverter.
I mean calculation and equation to verify the simulation.

I am sorry if I seem to be too theoretical, but I am only trying to learn more.
« Last Edit: February 21, 2016, 07:00:02 19:00 by promach » Logged
PICker
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« Reply #4 on: February 21, 2016, 07:29:56 19:29 »

I've found some links but I do not know if they can help you.
http://www.edaboard.com/thread199980.html
http://www.prenhall.com/howe3/microelectronics/pdf_folder/lectures/tth/lecture11.fm5.pdf
http://www.ti.com/lit/an/szza043/szza043.pdf
http://www.egr.msu.edu/classes/ece410/mason/files/Ch7.pdf
http://www-inst.eecs.berkeley.edu/~ee105/fa98/lectures_fall_98/093098_lecture16.pdf
http://www.aicdesign.org/SCNOTES/2006notes/Chap05(7_5_06).pdf

Usually the analog simulators use ODE (ordinary differential equation) systems for simulating changes in continous parameters by defining small time intervals and re-calculatng the entire ODE system for each time interval (using the parameters generated in the previous interval):
http://www.eng.auburn.edu/~wilambm/pap/2011/02_ijee2410ns.pdf

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sarbandi70
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« Reply #5 on: February 22, 2016, 03:05:51 15:05 »

for verify the simulation of this circuit you need to read chapter of 6 of Behzad Razavi-Design of Analog CMOS Integrated Circuits-McGraw-Hill Science_Engineering_Math (2000).
this is very good book for you.

 
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