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TucoRamirez
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« on: December 01, 2015, 07:33:30 07:33 »

Hi

I'm trying to figure out a way to use LDOs (some tenths of mAmps...)  and do a circuit (i was thinking of analog switches but maybe the Imax allowed would not help me) to generate a Variable VL - VH  square wave to inject  to a testchip in order to bias some pins ( most of them transistor bulks and comparators).  the problem with ldos could be the VL minimal value (some ldos cannot give me < 1.2V output


circuit will work with a 3V3 max amplitude and the output signal must be as fast as 100Hz, but the transient tr/tf gotta be kinda fast... (<1uS), in order to be applicable for the tests. 




As a note, In order to test the just the output without before asking myself about the current level or ldo, i built a nand gate clock (CD4093 based)  and put 2 output transistors to be manaed with CK and /CK ... the objective was to switch between 2 values on a resistor voltage divider on a opamp circuit (mcp6004) by using the 2 transistors...  and use that switched offset as the square V1-V2  signal.   the circuit can bias the testchip (yeah) but the output transient from VL to VH are sooo slow  (> 10uS) ...  Later i understood that the MCP amp is slow for large signals, so i'll check the opamp part, but the LDO part will be also something that i'm interest to compare to.


do you Any suggestions or a punch to give me to the face for some nonsense thing i did? (i mean for the LDO or to  choose another faster OPAMP)? 
 
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Tekno1
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« Reply #1 on: December 01, 2015, 09:34:50 09:34 »

Hello TucoRamirez,

Sorry I did not understand your circuit completely. (Looks like you have put a resistor divider at the output of an LDO and switch two unity gain opamp inputs to the properly selected VH and VL taps of resistor divider. Opamp outputs have bipolar transistors as buffers.)
If this is true you will have slow response since you have a resistor string divider and Opamp slew rate. You have to burn high current to settle fast by choosing small unit resistor values and find a fast opamp.

I will suggest using two variable voltage output LDO's with largest bypass capacitors allowable at their outputs to provide VH and VL voltage levels. Then use two MOSFET's serially as they are typically connected in an inverter, BUT please do not connect gates together but drive them with complementary non-overlapping clocks. Connect p-ch to 3.3V and n-ch to GND. Non-overlapping complementary clock and digital buffers to drive CMOS gates, could be made with discrete cross coupled logic circuit similar to integrated gate drivers in SMPS's. Now one can adjust LDO outputs and cover output voltages between 3.3V to GND level for VH and VL. CMOS Rds resistances exists and depending your input capacitance of biased test chip still there will be RC,  so one need to chose  MOS transistors accordingly. Discrete CMOS have in general much smaller Ron than IC Opamp's internal transistors but also have larger gate, drain and source capacitance's as design parameters. In this circuit except Vh and VL generators (LDO's) everything is digital so it can be made fast as long as Opams could supply reference voltages. If Opamp's will not able to provide high current than a discrete Transistor could be used at the output as emitter or source follower but than 3..3V vould not be reached at the output. Please consider it. Good luck.
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solutions
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« Reply #2 on: December 01, 2015, 11:46:44 11:46 »

Open drain CMOS logic gate, two pullup resistors (one to each supply), your favorite P-FET in series with each resistor, controlled by the remaining two OD outputs of your logic gate. Good for at least 10,000x your spec'd speed...

You can also use an N-MOSFET instead of the logic gate.

That'll be a $0.05 royalty, payable to that Sonsivri guy at the top of your screen
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crunx
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« Reply #3 on: December 01, 2015, 06:14:00 18:14 »

Using LDOs for direct driving such a way may be difficult, especially because most LDOs require an reasonably large output capacitor for stability. Also settling time might be a problem.

One working possibility would be to use a high-current Op-Amp such as Texas Instruments LM8272 to drive the voltage. That amplifier can handle up to 55mA according to the data sheet. Of course you must supply the amplifier with at least a little higher voltages than the required maximum amplitude, even if it is "Rail-to-Rail" capable, as with larger output current there will be some loss. Data sheet claims 1V from the rail at 55mA. But LDOs would need also a little more than the max. output voltage, so you likely have thought some voltage drop to go.

The elegance s that such an Op-Amp can be configured as gain=+1 non-inverting buffer, or it can provide some gain, if required. LM8272 is reasonably cheap and very small device. If you need more current, you can find even stronger amplifiers, and from several suppliers.
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TucoRamirez
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« Reply #4 on: December 01, 2015, 08:06:04 20:06 »

as i understood, the settling time for a large signal in the mcp6004 is exactly the value i saw in the oscilloscope when testing, so, i think i'll try both the LDO (with a fast response one)  and a more  speed / responsive opamp.     I'll   sketch a design tonite, to be tested tomorrow on breadboard...  i hope not to deceive you ... 
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2N5109
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« Reply #5 on: December 02, 2015, 02:45:50 02:45 »

Unless you need lots current, just use  D/A converter driven from  digital MUX and two digi-switches?  Digiswitches set voltages, MUX control selects which digiswitch word gets converted, sets timing.  Cheap DAC would settle in microsecond. Also easier to ultimately interface into automated control system for final use.

Ciao, 2N5109
 
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vern
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« Reply #6 on: December 02, 2015, 09:46:03 09:46 »

I would use an op-amp with a gain of 1, two voltage dividers to set the reference voltages and an analog switch to switch between the two voltages.
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Tekno1
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« Reply #7 on: December 03, 2015, 10:37:45 10:37 »

Hello TucoRamirez,

Thank you is due to "solutions" for summarizing the concept well. My thought process is much faster than I can talk or write and during the process time to time I forget where I am,  and end up long disconnected sentences Smiley

Thinking overnight,  since you have a test environment you would have power supplies with software controlled outputs available. Using two of these power supplies directly (with  bypass storage caps at close to logic connections as possible) is best rather than using opamp's or LDO's or any other extra costly circuit those would have very limited output power (therefore will have glitches and add cost). It seems you do not need dead on precision reference voltages (uV level) for VH and VL, than you do not need any circuit but two power supplies.

In analog design minimally necessary circuit is always yields optimum results. In digital designs using unnecessary more circuit blocks does not necessarily degrades performance (provided that end result is satisfactory) and could be marketed as complex circuit.

Good luck!
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vern
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« Reply #8 on: December 03, 2015, 01:48:58 13:48 »

Tekno1,
as I understood he wants to switch between 2 voltages with about 100Hz with a 1us rise/fall time.
That takes some circuitry.
Of course you can take two power supplies and switch between the two set outputs with an analog switch.
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crunx
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« Reply #9 on: December 03, 2015, 05:35:55 17:35 »

Because the amplitude is not very high nor the rise-time requirement too tough (Better than 1uS is doable without excotic technologies), the next question is if the voltage levels have to be electronically controlled, or if a potentiometer setting would do?

If manual adjustment os OK, the circuit becomes very simple: One analog switch fed with the chopping frequency, the voltage source, some resistors, and a reasonably fast and sufficiently "strong"  OpAmp - such as LM8272. That one can deliver tens of mA, and has a slew rate (relevant to the rise/fall time) of 12V/us. A rough guesstimate is that it should be able to provide 3.3V peak-to-peak with rise/fall times about 300 ns. (By picking a little more expensive and faster OpAmp would have even faster transition times.)

Ill try to draw the principal circuitry, and return to the matter.  now returning....

Please see the attached picture for a quick-and-dirty modeling of a simple implementation. Th input side can be improved, and on that OpAmp there is even a unused half, which could be utilized for something. Also, instead of a voltage buffer, one could use inverting summing amplifier, and that would be defined to have some gain. Or many other configurations should work. And also many OpAmps, the slew rate parameter being likely the most critical together with a descent drive capability. I picked this time a Linear amplifier, as LTspice library had it ready-made.

The resistor values are for reference only, and by changing them one can adjust the pulse high and low. Again, it could be done a little more elegantly, too. This is likely the simplest way with lowest component count, and not functionally so "pretty".

The attached TXT file should be of type .ASC as it is the LTSpice source file.
« Last Edit: December 03, 2015, 07:46:06 19:46 by crunx » Logged
TucoRamirez
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« Reply #10 on: December 04, 2015, 02:29:05 02:29 »

Hello TucoRamirez,

Thank you is due to "solutions" for summarizing the concept well. My thought process is much faster than I can talk or write and during the process time to time I forget where I am,  and end up long disconnected sentences Smiley

Thinking overnight,  since you have a test environment you would have power supplies with software controlled outputs available. Using two of these power supplies directly (with  bypass storage caps at close to logic connections as possible) is best rather than using opamp's or LDO's or any other extra costly circuit those would have very limited output power (therefore will have glitches and add cost). It seems you do not need dead on precision reference voltages (uV level) for VH and VL, than you do not need any circuit but two power supplies.

In analog design minimally necessary circuit is always yields optimum results. In digital designs using unnecessary more circuit blocks does not necessarily degrades performance (provided that end result is satisfactory) and could be marketed as complex circuit.

Good luck!

Yep, i agree with the "c'mon, put a generator dude and do more tricky things" but the aim of the circuit is precisely to put a LDO or a 'low' current , 'low' voltage part to the input than to plug a signal generator in square wave with offset... and that's why i finally asked for some  advice from us Wink
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crunx
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« Reply #11 on: December 04, 2015, 06:19:21 06:19 »

Depending your precise requirements, I could develop the input side a bit further, allowing you to have either more separation on "upper voltage"&"lower voltage" or "amplitude"&"offset".

However, for rise and fall times <1us using LDOs capability of adjusting voltages is rather hopeless. Even using a proper and fast amplifier, even, the capacitive part of load may cause problems. To change voltage by 1V over a capacitor of 1uF in 1us requires current of 1A! You can scale the actual requirement from that figure; f.ex. 3V over 0.1uF would be 300mA...
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TucoRamirez
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« Reply #12 on: December 07, 2015, 07:07:13 07:07 »

Hi, in order to mantain the 2 ldos, i'm planning to do the following circuit .

What do u think?
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vern
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« Reply #13 on: December 07, 2015, 09:38:56 09:38 »

If you are planning to have a rise and fall time of <1us this circuit will only work if your test circuit has very little input capacitance.
The DG419 has an ON resistance of 20 Ohms. If you apply the upper voltage to your test circuit, the voltage will only rise so fast if you have an input capacitance of less than <47nF. (20 Ohms on 47nF equals about 1us).
If your device switches to the lower voltage the input capacitance will discharge into the output capacitor of the lower voltage regulator which is 100nF.
That will slow the fall rate.
To get proper voltage levels at your test circuit you should buffer the voltage with a fast OP Amp with a gain of 1.
If your test circuit has only little input capacitance the circuit is fine.
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TucoRamirez
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« Reply #14 on: December 07, 2015, 02:20:02 14:20 »

the circuit to bias is an custom IC pin , so i expect a not that high input capacitance.  and the capacitor i placed is optional to me.    Do you think it could be still ok? (i"ll check also the opamp solution afaik and will put here)   
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vern
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« Reply #15 on: December 07, 2015, 05:21:25 17:21 »

TucoRamirez,
if it is only an IC input it will be ok. Capacitance will be some pF, that will pose no problems. No OP Amp needed.
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« Reply #16 on: December 08, 2015, 07:53:37 07:53 »

TucoRamirez,

I just quickly perused data sheets and stopped when I found issues stated below.

You need a minimum of 2.2μF output capacitance at the output of LDO's in order to having a stable operation (Pls Refer to LTC data sheet for the LDO you are using). With the circuitry you have, it is most likely that you will have nasty oscillations sometime during operation.

Analog switch will not work as you have planned, since it requires +12V Power supply for Rds=40Ohms. There is no indication or test condition that shows it may work with +5V power supply. If it works your Rds (or Rswitch) resistance will be much higher than 40Ohms.  Speed wise most probably there will not be a problem since DUT input capacitance should be small around 5-10pF. So please check whether analog switch is OK with 5V supply. I have not seen any info on the data sheet that part works with unipolar 5V supply (Part is tested at unipolar 12V. Among the typical characteristics graphs one shows Bipolar +/-5V Operation but not Unipolar 5V operation. Also typical operation graphs results are not verified by production tests but depends on only  few parts characterization on the bench for data sheet publication). Calling application support to clarify or if you already have the switch checking it out before committing to it would be a good idea.
Also there must be 5V operating analog switches around.

Good luck.

Posted on: December 08, 2015, 07:38:08 07:38 - Automerged

@vern,

Thanks for your comment. I am an analog IC designer and quite familiar with testing IC's. My two cents worth of advice was for IC testing ( I believe an IC is being tested) with a production tester. Putting circuits on a small DUT board presents reliability problems and failures that was my concern. IC testers (not the bench test with individual instruments) have quite precise programmable voltage source capabilities so minimal extra circuit normally needed. Following discussions I understand that the need is for a bench test (not a production test utilizing an IC tester or IC test setup in a lab). Sorry for any confusion I have created.
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TucoRamirez
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« Reply #17 on: December 08, 2015, 08:07:53 08:07 »

I kinda interpreted the following parts that uses an unipolar biasing... over 5Vdc



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Tekno1
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« Reply #18 on: December 08, 2015, 08:24:04 08:24 »

@TucoRamirez,

Higher the capacitor at the output of LDO is better to keep va1 and va2 dynamic variations to a minimum, provided that LDO is OK with it. Also Low and High Frequency by pass capacitor network at close to your analog switch S1 and S2 inputs will be good idea to reduce undershoot/overshoot at the DUT input (Circuit will have Di/Dt and traces have inductances). What is basically needed is a very low output impedance voltage sources at va1 and va2 and proper by-pass capacitance network on the traces,  so DUT input will settle  with a fast clean square switching input signal.

Posted on: December 08, 2015, 08:08:40 08:08 - Automerged

@TucoRamirez,

I did not look applications section but specifications. Looks like analog switch is designed to work at 5V (no production test done on it though).
Thanks for pointing out.
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vern
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« Reply #19 on: December 08, 2015, 04:14:27 16:14 »

Tekno1,

you are right, I overlooked the voltage requirements for the DG417.
Might work with 5V, it's just not specified. It works with 12V unipolar.
However there are plenty of 5V analog switches around, like the TS5A3160DBVR.
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« Reply #20 on: December 10, 2015, 09:44:40 09:44 »

Maybe DG469 is better, low on resistance, more current, it seems me up to 120 mA normally it used on power routing applications.

Ciao Max
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TucoRamirez
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« Reply #21 on: December 10, 2015, 05:17:29 17:17 »

i'll test tomorrow with the 417...   i'll tell you if i killed my bias squarewaves or not Wink ...
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« Reply #22 on: December 10, 2015, 07:33:58 19:33 »

If you want a low resistance analog switch which operates well on low supply voltages, you might try MAX4729 or MAX4730. They are specified for supply voltage of 2.7 to 5.5V. The ON resistance is pretty low, too: 3.5 ohm on 2.7V supply, and even lower with 5V supply.That switch would in other words be a good substitute for DG419 in your configuration.

However, the OpAmp-based circuitry I propose earlier would be even simpler.
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TucoRamirez
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« Reply #23 on: December 11, 2015, 09:40:38 21:40 »

First:
MAX419 works fine at 5V.  (kind fine ^^ i have a weirdo switching but i think is because of the logic gate clock (classical 2 inverters + buffer) i use)

Here the transients in an attached image.  I'll retest using an mcu to check if i can supply a more 'squared' square wave...   (btw i put the picoscope in AC mode in order to premeasure a rise time, that's why signal passes by negative, in real life the signal is changing from 1.4 to 1.7V)

btw , do you have some tips to reduce capacitances on the output (i put a screwdriver connector in the out but i siuppose it can give more than pF as Ceq, i'll take it away and retest later...  it's time to sleep ^^

« Last Edit: December 11, 2015, 09:43:01 21:43 by TucoRamirez » Logged

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vern
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« Reply #24 on: December 12, 2015, 04:52:37 16:52 »

Did you mean the DG419 works fine at5V? MAX 419 is a very slow Op-Amp.
The spikes are probably the result of a feedback effect due to the rising voltage or just crosstalk from your gate to the output.
It will probably go away when you put a load on the output, even if its only some kohm
But what the loaded curve shows: the analog switch has to much resistance to charge your input capacitance in less than 1us.
You need to operate it with a higher voltage (12V), that will decrease the resistance or add an OP-Amp as a buffer.
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