[REQ] Viterbi Decoding

[RedBull]

Does anyone have materials related to implementation of Viterbi algorithm using VHDL on FPGA? Any information would be very helpful.
Thanks

[DarkClover]

There is a lot of Information about the Viterbi algorithm and FPGA on the internet:

First is Wikipedia but I'm sure you have read this. (http://en.wikipedia.org/wiki/Viterbi_algorithm)
Have a look at the attachments there are some projects using the Viterbi algorithm.

[janakfun]

If you are looking for VHDL implementation of the same ,let me please know the K  and r values you wish to have for the algorithm .

[RedBull]

If you are looking for VHDL implementation of the same ,let me please know the K  and r values you wish to have for the algorithm .

I'm looking to implement K=3 and r=1/2 decoder first. Then i'll do it for higher K value.
Thank you

[janakfun]

Hi
sorry for the late reply, i was a bit busy.
Anyway , please find in this link ,
 http://www.expertcore.org/viewtopic.php?f=8&t=866

this could may be useful to you. please try some code converter tools as the code is in C++ .
or
 Try this code from open cores .

  http://www.opencores.org/project,vhcg

 (this is in VHDL, for k= 7 , r= 1/2 )