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December 05, 2016, 03:28:13 03:28


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Author Topic: USBee, Logic, etc.  (Read 12972 times)
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yahoo
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« on: December 01, 2009, 03:43:55 15:43 »

Sorry but I had to edit my postings about this topic. I've been kindly asked to do so by the developer of these products and I respect his efforts to do good stuff for all of us.
« Last Edit: December 18, 2009, 07:38:16 19:38 by yahoo » Logged
petarp
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« Reply #1 on: December 01, 2009, 07:31:09 19:31 »

Hi. Can you post USBee SX schematic and full eeprom content for it?

Thanks.
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sslobodyan
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« Reply #2 on: December 05, 2009, 09:29:18 21:29 »

Hi.
Can anybody post the USBee AX scheme?
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wild
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« Reply #3 on: December 06, 2009, 05:43:50 05:43 »

Unfortunately I don't have time to extract the exact schematic from USBee SX but it is almost the same with the attached schematic...
Unfortunately the difference between the schematic you posted and the SX/ZX (which I do not own) are various:
- the bidirectionality of the I/O pod port (no jumper to be set)
- support of the CLOCK and TRG lines.
- the CLOCK line seems to be bidirectional (it can accept an external clock signal for synchronous capture)

I do not know if the ElraSoft one has the same capabilities as the SX/ZX (except for the 16bit I/O)

Maybe some of the Sonsivri members have also the schematics of the SX/ZX: I will be grateful if they can post it.
(i tried to access the russian forum, but I wasn't able to register, so downloads are disabled)

- - - - - - - - - - - - - - - - -
Edited some hours later....

OK, some of my assumptions were wrong: I installed Proteus and opened the schematics of the AX device and it seems that the developers of USBee (SX/ZX) didn't put ANY buffering/protection on the I/O ports of the CY7C68013A!!!
Except for the 100 Ohm resistors/diodes combination, there are NO buffers (SN74LVC8T245).
I think this is really poor design and now I understand why they are rather shy about the input/output voltage maximum/minimum ratings on their web site!
If you will use the USBee with lower voltage devices (1.8/2.5V) you can have problems...

The "CLOCK" signal is always in Output mode.
Instead the "TRG" line is used for synchronous capture and is DIRECTLY connected to the Cypress chip...  Shocked

_ _ _
Do you know how do the other products (Logic/ElraSoft/...) behave on such matters?
« Last Edit: December 06, 2009, 08:08:19 08:08 by bepobalote » Logged
Kabron
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« Reply #4 on: December 14, 2009, 01:35:20 13:35 »

Hi guys, here is my topics on USBee devices.
http://kazus.ru/forums/showthread.php?t=13724
http://kazus.ru/forums/showthread.php?t=14159
I'd successfully repeat USBee AX Pro and USBee DX.
Now I'm working on pocket scope based on this chip.
http://kazus.ru/forums/showthread.php?t=15501
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Kabron
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« Reply #5 on: December 14, 2009, 06:27:38 18:27 »

There is a way not 2 use several models codes in the EEPROM chip. If you add VID/PID device definititions into cypress driver inf file, then Cypress CyConsole will recognise these devices, and you'll have ability to change EEPROM contents on the fly via CyConsole.  In this case small EEPROM is enoight e.g. 24LC02.
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frithbar
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« Reply #6 on: December 16, 2009, 08:05:10 08:05 »

Will the Logic firmware run on the stock SX hardware?

I changed the EEPROM bytes to match Logic (above) and installed
the Logic software and drivers.  The software, however, remains
"Disconnected" and errors out (.NET winusbinterface endpoint error).

Any thoughts?
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digitalmg
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« Reply #7 on: December 16, 2009, 07:37:15 19:37 »

Thank you yahoo for your answer.I understood your explainantion.I will have to buy the license for USBee Suite Pro,I coudn't find something free on the internet. J1939 is a protocol based on standard 29bit CanBus, and i need to use PacketPresenter Protocol Analyzer to see decode data filds.
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