Sonsivri
 
*
Welcome, Guest. Please login or register.
Did you miss your activation email?
November 10, 2024, 07:47:50 19:47


Login with username, password and session length


Pages: [1]
Print
Author Topic: Problem in AVR Programming  (Read 4869 times)
0 Members and 1 Guest are viewing this topic.
wellnerson1
Active Member
***
Offline Offline

Posts: 123

Thank You
-Given: 34
-Receive: 152


« on: October 22, 2008, 03:41:32 15:41 »

Let me know any one of this ever glittering forum that "how to set and clear the timer overflow flags in AVR mega16 processor during run time?" Huh please.
Logged
cluoiset
Newbie
*
Offline Offline

Posts: 9

Thank You
-Given: 0
-Receive: 1


« Reply #1 on: October 22, 2008, 09:43:58 21:43 »

TIMSK = (1<<OCIE1A)

I think
Logged
Belgitaes
Junior Member
**
Offline Offline

Posts: 42

Thank You
-Given: 19
-Receive: 17


« Reply #2 on: October 24, 2008, 08:30:38 08:30 »

set and clear the timer overflow flags in AVR mega16
with AVRSTUDIO

Code:
;------------------------------------------------------ 
; Declaraciones estandar para este micro

.include "m16def.inc"
;-----------------------------------------------------------
; Definicion de constantes y variables
; --------------------------------------------------------
; Pila
  .equ          PILA                   =0x0FF
;-----------------------------------------------------           
.DSEG       
; MEMORIA RAM       
    .ORG                (PILA+1)
;----------------------------------------------------
;            Vectores de interrupcion
;----------------------------------------------------           
.CSEG       
    .ORG     0x0000         
    rjmp        RESET                        ; RESET

    .ORG 0x0007
rjmp OverFlow0 ;OverFlow Temp/Cont0
; --------------------------------------------------------
;                       RUTINA DE RESET
; --------------------------------------------------------
RESET:
   cli
   ldi        r16,HIGH ( PILA )         
   out        SPH,r16         
   ldi        r16,LOW (PILA )                         
   out        SPL,r16         

;*******DESDE AQUÍ VUESTRO CODIGO*****

;...............................................
; Init Port:

  ser r16
  out DDRB,r16   ; Set PORTB to output
  clr r16
  out PORTB,r16  ; Set PORTB to 0


;...............................................
sei ;Autorizacion Interrupcion General

;TimsK:

ldi r16,0x02
out TimsK,r16

;TcnT0:

;( Overflow) delay 8 MILISEGUNDOS prescaler clk/64 8000=16384-(x*64)
;............................................................................
             ;256 x 64 = 16834 microsegundos
ldi r16,0x83 ;16.834/100 = 163,84 X 8 = 1.310,72 x 100 = 131,072
             ;131 Decimal = 83 Hexadecimal
             ;256 Decimal = 100 Hexadecimal - 83 = 7D
             ;7D = 125 x 64 = 8.000 microsegundos
out TcnT0,r16


ldi r16,0x03
out TccR0,r16

;Configuro La Salida Por Hacer Algo
;Del Puerto Para Cuando Salga Del Bucle .
;.........................................
ldi r16,0x02 

Salto:
tst r16
dec r16
breq OverFlow0
rjmp Salto

OverFlow0:
ldi r16,0x08
out PortB,r16 ;Configuro Pin3 del PORTB A 1

out TcnT0,r16 ;Contador A 0
out TimsK,r16 ;Deshabilito Interrupcion
reti         ; Retorno de La Interrupcion

;****HASTA AQUÍ VUESTRO CODIGO********

STOP:        rjmp        STOP   ;FIN DEL PROGRAMA
you can simulate with proteus

http://rapidshare.com/files/157022595/set_and_clear_the_timer_overflow.zip.html
Logged
wellnerson1
Active Member
***
Offline Offline

Posts: 123

Thank You
-Given: 34
-Receive: 152


« Reply #3 on: October 25, 2008, 04:41:23 04:41 »

That’s greatly appreciated cluoiset and Belgitaes. But I’m interested in manipulating the bits in TIFR register in ATMEL mega16 which is meant for clearing and setting the corresponding flags, during run time. In my attempts I tried to manipulate using logical operation with the register TIFR, but during execution the flag bits failed to update and the same results I got in my experiment also.  Help sought for in this context. Huh Thanks in advance Wink.
Logged
Belgitaes
Junior Member
**
Offline Offline

Posts: 42

Thank You
-Given: 19
-Receive: 17


« Reply #4 on: October 27, 2008, 09:09:51 09:09 »

TIMSK = (1<<OCIE1A)

COMPA Timer/Counter1 Compare Match A


Code:
;------------------------------------------------------ 
; Declaraciones estandar para este micro

.include "m16def.inc"
;-----------------------------------------------------------
; Definicion de constantes y variables
; --------------------------------------------------------
; Pila
  .equ          PILA                   =0x0FF
;-----------------------------------------------------           
.DSEG       
; MEMORIA RAM       
    .ORG                (PILA+1)
;----------------------------------------------------
;            Vectores de interrupcion
;----------------------------------------------------           
.CSEG

       
    .ORG     0x0000   rjmp              RESET
    .ORG     0x0002   EXT_INT0:     RETI ;External Interrupt Request 0
    .ORG     0x0004   EXT_INT1:  RETI ;External Interrupt Request 1
    .ORG     0x0006   TIM2_COMP: RETI ;COMP Timer/Counter2 Compare Match
    .ORG     0x0008   TIM2_OVF: RETI ;OVF Timer/Counter2 Overflow
    .ORG     0x000A   TIM1_CAPT: RETI ;CAPT Timer/Counter1 Capture Event
    .ORG     0x000C   rjmp TIM1_COMPA    ;COMPA Timer/Counter1 Compare Match A
    .ORG     0x000E   TIM1_COMPB: RETI ;COMPB Timer/Counter1 Compare Match B

    .ORG     0x0014   SPI_STC:     RETI ;STC Serial Transfer Complete
    .ORG     0x0016   UART_RXC:     RETI ;RXC USART, Rx Complete
    .ORG     0x0018   UART_DRE:     RETI ;UDRE USART Data Register Empty
    .ORG     0x001A   UART_TXC:     RETI ;TXC USART, Tx Complete
    .ORG     0x001C              RETI ;ADC ADC Conversion Complete
    .ORG     0x001E   EE_RDY:      RETI ;EE_RDY EEPROM Ready
    .ORG     0x0020   ANA_COMP: RETI ;ANA_COMP Analog Comparator


;*******DESDE AQUÍ VUESTRO CODIGO*****

 CLI
               
RESET:

 ldi R16,low(RAMEND)
 out SPL,R16
 ldi R16,high(RAMEND)
 out SPH,R16

; Init Port:

 ser   r16
 out   DdrB,r16 ;PortB = Salida
 
 sei ;Interrupt Enable

 ldi   r16,0x14 ;OCIE1A=1
 out   TIMSK,r16 ;TIMSK = (1<<OCIE1A)(1<<TOIE1) 


 ldi r16,0x00
 out TCNT1H,r16
 out TCNT1L,r16 ;Contador Del Timer

 ldi r16,0x00
 out OCR1AH,r16
 ldi r16,0x10 ;Registre De Comparacion
 out OCR1AL,r16

 ldi r16,0x09 ;CTC1=1
 out TCCR1B,r16 ;=Clock (1<<WGM12)(1<<CS10)   

CompareRegistre:
 brne CompareRegistre

 TIM1_COMPA:

 ldi r16,0x80     ;Pb7=1
 out PORTB,R16
 reti

.exit

;****HASTA AQUÍ VUESTRO CODIGO********



OCIE1A Timer/Counter1, Output Compare A Match Interrupt Enable When the bit is 1
the interruption is validated for Timer/Counter1 and OCF1A bit is changed in the registry
TIFR

TOIE0 Timer/Counter0 Overflow Interrupt Enable When the bit is 1 interruption is validated
and the Timer/Counter0 bit TOV0 is amended in the register TIFR.

« Last Edit: October 27, 2008, 09:20:21 09:20 by Belgitaes » Logged
sam_des
Senior Member
****
Offline Offline

Posts: 256

Thank You
-Given: 128
-Receive: 151


« Reply #5 on: October 29, 2008, 10:40:06 10:40 »

Hi,

You can't manipulate the interrupt flags as you can do with other processors. Remember that the interrtupt flag is SET when interrupt occurrs & you have to write ONE to it WIHTOUT use of logical operators to clear it.
e.g. If TIMER1 has interrupted with Compare Match 1 then OCF1A flag will be SET. To clear it you must write 1 to it - TIFR = (1<<OCF1A) and not TIFR |= (1<<OCF1A) nor TIFR &= ~(1<<OCF1A). This way it is ensured that no other bits in same registers are modified incorrectly. If you have defined ISR for your interrupt then AVR will automatically clear flag once ISR is executed(There are few exceptions such as TWI).

As AVR has load-store architecture any logic operation will require 3 instructions atleast - load, modify, store. This may affect other bits in same register if they are modified in between these instrucitons.

BTW, I don't get your point of manipulating interrupt flags. Why do you need it ?
If you provide more details may be we can find out other ways..

regards,
sam_des
Logged

Never be afraid to do something new. Remember Amateurs built the Ark, Professionals built the Titanic !
wellnerson1
Active Member
***
Offline Offline

Posts: 123

Thank You
-Given: 34
-Receive: 152


« Reply #6 on: March 09, 2009, 12:12:15 12:12 »

As i forget the problem for which i thought the bit manipulation TIFR  sorry dear sam_des? If it comes in my mind i will let you know.

More over right now i have a problem please let me clarify is it true??

The Problem is:-
I made PORTB as output port in my program and while the AVR startes executing the program all the pins of PORTB becomes HIGH state for approximately 5 to 25 micro seconds and then works as i wish. sometimes even i coudnt capture the duration of HIGH state with my TEK OSC, iam totally confused. Anybody suggest whether it will cause any problem in firing high power inverters?
Logged
sam_des
Senior Member
****
Offline Offline

Posts: 256

Thank You
-Given: 128
-Receive: 151


« Reply #7 on: March 09, 2009, 06:39:49 18:39 »

Hi,
Quote
As i forget the problem for which i thought the bit manipulation TIFR  sorry dear sam_des? If it comes in my mind i will let you know.
Don't worry. It happens all the time to all of us  Tongue

Quote
The Problem is:-
I made PORTB as output port in my program and while the AVR startes executing the program all the pins of PORTB becomes HIGH state for approximately 5 to 25 micro seconds and then works as i wish. sometimes even i coudnt capture the duration of HIGH state with my TEK OSC, iam totally confused. Anybody suggest whether it will cause any problem in firing high power inverters?

Check the datasheet  Undecided
But if you don't want to --
1) All the ports are tri-stated(high z) during the RESET. That's why when you try to check them, they can in any state. Even your DMM or oscilloscope probe may change it's state.
2) There is in-built power-on delay after reset to allow power & clock to stabilize. You select how much this delay is when you program the fuses.
3) If you are writing your software in C, then after reset, c0 module gets control, which intializes the data/return stacks, zeros entire ram, intializes static vars from rom and many other things.
That just indicates that your code initializing  PORTB as output executes much later than you imagin.

Well there might be problems with power inverters, if this causes simultaneous turn-on of full/half bridge leg or push pull  Angry

Solution is simple one-
1) Use pull-down resistors on these pins or
2) Use a driving logic/driver that is active-low to drive mosfet.

regards,
sam_des
Logged

Never be afraid to do something new. Remember Amateurs built the Ark, Professionals built the Titanic !
wellnerson1
Active Member
***
Offline Offline

Posts: 123

Thank You
-Given: 34
-Receive: 152


« Reply #8 on: March 10, 2009, 11:40:33 11:40 »

I thank you profusely dear friend SAM_DES, for your solutions. I have followed your solution but with little modification as 1) i've used the internal pull up instead of external (thanks for remembering me the pull up/down concepts) 2) i've followed your  second solution as such now its perfectely OK.

By the way sam_des the foot note of your posting is absolutely motivating and giving a new dimension to hardwork.

With regards,
 Cheesy Wink
Logged
Pages: [1]
Print
Jump to:  


DISCLAIMER
WE DONT HOST ANY ILLEGAL FILES ON THE SERVER
USE CONTACT US TO REPORT ILLEGAL FILES
ADMINISTRATORS CANNOT BE HELD RESPONSIBLE FOR USERS POSTS AND LINKS

... Copyright 2003-2999 Sonsivri.to ...
Powered by SMF 1.1.18 | SMF © 2006-2009, Simple Machines LLC | HarzeM Dilber MC